This page lists RISC-V based projects with a high number of RISC-V harts per device and a high MIPS number.

In order to list the project here, the following requirements must be met:

    - the source code must be freely available to everyone,
    - an executable bitfile must be provided and
    - the hart and MIPS number must be given.

Please send in relevant projects to be considered for this page.

Lattice

Device	Board	Spec	Harts	MIPS	Benchmark	Source Code	Owner
ICE40-LP8K-CM81	TinyFPGA BX	RV32I	32	465	n/a *)	BX	Tobias Strauch

Limited to a programming element (PE) of a processor array. Therefor no system registers, no fence, no ecall and no invalid instruction detection.