PDVL is an aspect-oriented and transaction-level Programming, Design and Verification Language. The electronic system level (ESL) language is inspired by SystemVerilog, SystemC and many others, but adds for example program paradigms such as aspect and transaction oriented programming. To name a few improvement over existing languages, the method to define inverse transactions is added, software sequences become integral part of static verification, auto-abstraction during runtime is proposed and the paradigm of a design hierarchy becomes only relevant when required. PDVL offers novel solutions for state-of-the-art topics such as portable stimulus, intelligent testbench generation and various other ESL methodologies.

PDVL Specification and Examples:

The PDVL specification can be found here: https://github.com/cloudxcc/PDVL

The PDVL Examples (https://github.com/cloudxcc/PDVL_Examples) demonstrate a RISC-V executable specification and a minimalistic 3-stage RISC-V SoC.


I introduced PDVL at the IEEE Euromicro DSD Conference 2017:

T.Strauch, "An Aspect and Transaction Oriented Programming, Design and Verification Language", IEEE Euromicro DSD 2017, Vienna, Austria, 30th Aug. - 1st Sep., pp. 30-39. http://ieeexplore.ieee.org/document/8049764/

A video was recorded at the ORConf 2017 in Hebden Bridge, UK in September 2017, where I presented PDVL to the open source community:

Latest IEEE paper on PDVL and "Dynamic Inside-Out Verification Using Inverse Transactions in TLM" is now online: https://ieeexplore.ieee.org/document/8524048

Currently I'm working on a documentation on how to use the language and on an open source tool to support it. Stay tuned !

last modified: 2024/Mar/28